AI Engineer
Job Description
AI Engineer – Defence RAG Systems ( Security Clearance Essential )
Clearance: Active SC Essential | Sector: Defence
Role Overview
Defence client requires an SC Cleared AI Engineer to build fully on-premises RAG systems using open-source technologies. You’ll develop classified AI capabilities on air-gapped infrastructure with zero external dependencies.
Key Responsibilities
– Build end-to-end RAG pipelines on isolated defence networks using open-source LLMs (Llama 3, Mistral, Qwen)
– Deploy local vector stores (Chroma, FAISS, Milvus) with sensitive document ingestion pipelines
– Host and optimise LLMs using vLLM/TGI on local GPU clusters without internet connectivity
– Implement agent orchestration using LangChain/LangGraph in completely offline environments
– Design secure document processing for classified materials with appropriate data sanitisation
– Build monitoring and evaluation systems that operate within air-gapped infrastructure
Essential Requirements
– Active SC Clearance (non-negotiable) – willingness to undergo DV if required
– Demonstrable experience deploying open-source LLMs (Llama, Mistral, Falcon) on-premises
– Expertise with local vector databases (Chroma, FAISS, Weaviate) in offline deployments
– Strong vLLM/Text Generation Inference experience for high-throughput model serving
– Proven ability to work on air-gapped systems with no external package repositories
– Experience with GPU orchestration (NVIDIA A100/H100) and CUDA optimisation
– Python expertise with offline dependency management and local package mirrors
Technical Stack (All On-Premises)
Models: Llama 3, Mistral, Qwen (locally hosted)
Vector Stores: Chroma, FAISS, Milvus
Orchestration: LangChain, LangGraph for agents
Hosting: vLLM, TGI, Ollama on bare metal/private cloud
Infrastructure: Air-gapped Kubernetes, local container registries
Desirable Skills
– Experience with defence/government IT security protocols
– Knowledge of CIS benchmarks and NCSC guidelines
– Familiarity with cross-domain solutions and data diodes
– Understanding of classification marking and handling procedures
EWJD2
