Tenstorrent

Architecture, Technical Program Manager

27 October 2025
Apply Now
Deadline date:
£100000 - £500000 / year

Job Description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.

We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. The Technical Program Manager will drive the end-to-end execution of next-generation SoCs, from early architecture through RTL, verification, DFT, physical design, tape-out, and post-silicon validation. This role requires strong technical depth in silicon development alongside program management expertise to ensure successful delivery of complex, cross-functional projects.

This role is hybrid, based out of Santa Clara, CA. We welcome candidates at various experience levels for this role.

During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You AreComfortable operating at the intersection of technology, execution, and business. Skilled at breaking down complexity into clear goals and deliverables.

A strong communicator who ensures alignment across technical and non-technical teams. Proactive, adaptable, and capable of thriving in ambiguity. Driven by impact and motivated to shape the future of silicon and AI platforms.

What We NeedBachelor’s or Master’s degree in Electrical/Computer Engineering or related field. 10+ years of semiconductor experience (Architecture, Physical Design, RTL, Design Verification, or Program Management).

Strong understanding of chip architecture, design flows, and system-level tradeoffs. Familiarity with industry standards across compute and SoC (e. g.

, ARM, RISC-V, AI accelerators, interconnect protocols). Experience leading large, cross-functional engineering teams and managing dependencies. Proficiency with project management tools (e.

g. , JIRA, Confluence) and structured reporting. What You Will LearnHow advanced SoC programs integrate CPUs, accelerators, interconnect, and memory subsystems.

The balance of technical tradeoffs across power, performance, area, and time-to-market. Best practices for coordinating hardware, software, and system teams on high-stakes projects. Insights into emerging technologies in AI compute, networking, and silicon platforms.


EWJD3